Dear All
Kindly go through the openings bellow and send your resume nitesh.gautam@ st.com
Please mention job code for which you want to apply .
@ 1) HED – IP Verification: 111578
Location: : Greater Noida & Bangalore
- Protocols: SATA, USB, Ethernet or PCIe,
- Languages: ‘e’, systemC, verilog &
- Tools: Specman, Ncsim, Design Compiler, Tetramax,IP Screen etc
- Experience in SoC / Subsystem level verification with scripting knowledge is required.
- Architecture knowledge with Synthesis / DFT flow is preferable.
B.Tech or M.Tech - Electronics
Exp: 2 - 5 yrs
2) HED – Post Silicon Validation: 111409
Location : Greater Noida
- Embedded “C”
- Good understanding on computer architecture
- RTOS understanding
- Good Knowledge of Test Equipment like Osciloscope/ Logic analyser/Protocol analysers
- Good understanding of Analog Ckts is a plus.
- Excellent problem solving Skill.
Education Level Required - B.Tech (Electronics)
Exp - 1 – 3 yrs.
3) HED – Pre Silicon Validation: 111414
Location : Greater Noida
-Person will be responsible for setting up Hardware Emulation platforms for IP and SoC verification/ Validation .Dealing with state of the art Emulation / Co- Emulation tools & tech i.e Xtreme / Palladium / Veloce , Accelerated Power, Coverage, SceMi Transactional based Emulation Methodology.
-Person will also be responsible for automation of Verification flow with Division Projects.
- Working Knowledge on any Emulation system is preferred.
- Language – C, C++, VHDL, Verilog
- Synthesize Knowledge using Simplify Synthesize tool for FPGA
- Chip Validation
- Design debug and Analysis.
Education Level Required - B.Tech (Electronics)
Exp - 2–4 yrs
4) HED – Software Engineer: 110310
Location : Greater Noida
- Develop software (drivers, middleware) for Setup box SoCs
- Knowledge on STB domain, Cable, Multimedia, Microcontroller, Broadcast Standards- Satellite, terrestrial
- Writing drivers/application software
- Creating Test suite and Test cases.
- Debugging system related issues (Linux, RTOS)
- Hardware debugging using CRO, Oscilloscope etc.
Education Level Required - B.Tech (Electronics)
Exp - 1–3 yrs & 5-9 yrs
5) HED – Software Engineer: 109399
Location : Greater Noida
- Key Skills: Linux (OS, Kernel Level programming, Device drivers, platform drivers), RISC processors (ARM, MIPS, ST40 etc…)
- VoIP protocols specific to PacketCable/ DOCSIS
- Ability to analyze the product/Feature
- Design documentation
- Tools and techniques for embedded development
Education Level Required - B.Tech (Electronics)
Exp - 5–9 yrs
6) HED – Software Engineer: 109397
Location : Greater Noida
- Media plane testing (Speech Codecs, T.30 FAX data pumps, T.38 FAX Relay, DTMF Relay, Voice Quality test, SLIC-ATA)
Education Level Required - B.Tech (Electronics)
Exp - 3–5 yrs
7) HED – Software Engineer: 109397
Location : Greater Noida
- Exp in SIP/IMS Signaling Security (IPSec, AKA, TLS, Certificate, AESD/3DES encryption/decrypti on, NAT)
Education Level Required - B.Tech (Electronics)
Exp - 3–5 yrs
8) CCI – Software Test Engineer: 111677
Location : Greater Noida
- Knowledge on NAND, SD/SDIO, PCIx, Jpeg etc, Linux device drivers
- Experience in working in Linux Environment and Good in C
- Creating Test suite, Test cases, Scripting and coding
- Bug Reporting tool usage
- Test Reports and Status reports writing
-Know how to debug problems of Evaluation Board & usage of JTAG Debugger, Oscilloscope
Education Level Required - B.Tech (Electronics)
Exp - 2–5 yrs
9) CCI – Software Test Engineer: 111678
Location : Greater Noida
- To Develop the Linux Device Driver of different IPs, covering all the functionalities provided by IP.
- Develop Unit Test Cases for verifying the functionality of the driver.
- Skills: Good in C.
- Experience in working in Embedded Linux Environment
- Experience in using Gnu tool chain
- Bug Reporting tool usage
- Know how to debug problems of Evaluation Board & usage of JTAG Debugger, Oscilloscope
Education Level Required - B.Tech (Electronics)
Exp - 2–5 yrs
10) CCI – SOC Back end ASIC Designer: 112857
Location : Greater Noida
- Expert level understanding of Physical design methodology, tools, and trade-offs.
- User level understanding of CMOS process, technology files and design kits.
- User level Understanding of synthesis, timing analysis, and design sign-off
- Hands-on experience of at-least one commercial EDA tools (Cadence, Synopsys, Magma).
- First hand experience of SOC level physical design.
-Awareness for specific CSD markets (such as printer or consumer in general) would be a big advantage
Education Level Required - B.Tech (Electronics)
Exp - 3–6 yrs
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